nrf9160

Vendor Web: Nordic Semiconductor

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All devices of this Vendor

Name : nrf9160

Flash : 1024 kB

Flash bank : 0x100000 Bytes @ 0x0

Flash bank : 0x38 Bytes @ 0xFF8000

Flash bank : 0x2F8 Bytes @ 0xFF8108

RAM : 256 kB

RAM : 0x00040000 Bytes @ 0x00040000

description : nrf9160 reference description for radio MCU with ARM 32-bit Cortex-M33 Microcontroller

Architecture

Architecture : (CM33)

revision : r0p4

endian : little

Memory Protection Unit (MPU) : available

Floating Point Unit (FPU) : available

Number of relevant bits in Interrupt priority : 3

Peripherals

name : CC_HOST_RGF_S
description : CRYPTOCELL HOST_RGF interface
base address : 0x0

name : CLOCK_NS
description : Clock management 0
base address : 0x0
Interrupt (5) CLOCK_POWER

name : CLOCK_S
description : Clock management 1
base address : 0x0
Interrupt (5) CLOCK_POWER

name : CRYPTOCELL_S
description : ARM TrustZone CryptoCell register interface
base address : 0x0
Interrupt (64) CRYPTOCELL

name : CTRL_AP_PERI_S
description : Control access port
base address : 0x0

name : DPPIC_NS
description : Distributed Programmable Peripheral Interconnect Controller 0
base address : 0x0

name : DPPIC_S
description : Distributed Programmable Peripheral Interconnect Controller 1
base address : 0x0

name : EGU0_NS
description : Event generator unit 0
base address : 0x0
Interrupt (27) EGU0

name : EGU0_S
description : Event generator unit 1
base address : 0x0
Interrupt (27) EGU0

name : EGU1_NS
description : Event generator unit 2
base address : 0x0
Interrupt (28) EGU1

name : EGU1_S
description : Event generator unit 3
base address : 0x0
Interrupt (28) EGU1

name : EGU2_NS
description : Event generator unit 4
base address : 0x0
Interrupt (29) EGU2

name : EGU2_S
description : Event generator unit 5
base address : 0x0
Interrupt (29) EGU2

name : EGU3_NS
description : Event generator unit 6
base address : 0x0
Interrupt (30) EGU3

name : EGU3_S
description : Event generator unit 7
base address : 0x0
Interrupt (30) EGU3

name : EGU4_NS
description : Event generator unit 8
base address : 0x0
Interrupt (31) EGU4

name : EGU4_S
description : Event generator unit 9
base address : 0x0
Interrupt (31) EGU4

name : EGU5_NS
description : Event generator unit 10
base address : 0x0
Interrupt (32) EGU5

name : EGU5_S
description : Event generator unit 11
base address : 0x0
Interrupt (32) EGU5

name : FICR_S
description : Factory Information Configuration Registers
base address : 0x0

name : FPU_NS
description : FPU 0
base address : 0x0
Interrupt (44) FPU

name : FPU_S
description : FPU 1
base address : 0x0
Interrupt (44) FPU

name : GPIOTE0_S
description : GPIO Tasks and Events 0
base address : 0x0
Interrupt (13) GPIOTE0

name : GPIOTE1_NS
description : GPIO Tasks and Events 1
base address : 0x0
Interrupt (49) GPIOTE1

name : I2S_NS
description : Inter-IC Sound 0
base address : 0x0
Interrupt (40) I2S

name : I2S_S
description : Inter-IC Sound 1
base address : 0x0
Interrupt (40) I2S

name : IPC_NS
description : Inter Processor Communication 0
base address : 0x0
Interrupt (42) IPC

name : IPC_S
description : Inter Processor Communication 1
base address : 0x0
Interrupt (42) IPC

name : KMU_NS
description : Key management unit 0
base address : 0x0
Interrupt (57) KMU

name : KMU_S
description : Key management unit 1
base address : 0x0
Interrupt (57) KMU

name : NVMC_NS
description : Non-volatile memory controller 0
base address : 0x0

name : NVMC_S
description : Non-volatile memory controller 1
base address : 0x0

name : P0_NS
description : GPIO Port 0
base address : 0x0

name : P0_S
description : GPIO Port 1
base address : 0x0

name : PDM_NS
description : Pulse Density Modulation (Digital Microphone) Interface 0
base address : 0x0
Interrupt (38) PDM

name : PDM_S
description : Pulse Density Modulation (Digital Microphone) Interface 1
base address : 0x0
Interrupt (38) PDM

name : POWER_NS
description : Power control 0
base address : 0x0
Interrupt (5) CLOCK_POWER

name : POWER_S
description : Power control 1
base address : 0x0
Interrupt (5) CLOCK_POWER

name : PWM0_NS
description : Pulse width modulation unit 0
base address : 0x0
Interrupt (33) PWM0

name : PWM0_S
description : Pulse width modulation unit 1
base address : 0x0
Interrupt (33) PWM0

name : PWM1_NS
description : Pulse width modulation unit 2
base address : 0x0
Interrupt (34) PWM1

name : PWM1_S
description : Pulse width modulation unit 3
base address : 0x0
Interrupt (34) PWM1

name : PWM2_NS
description : Pulse width modulation unit 4
base address : 0x0
Interrupt (35) PWM2

name : PWM2_S
description : Pulse width modulation unit 5
base address : 0x0
Interrupt (35) PWM2

name : PWM3_NS
description : Pulse width modulation unit 6
base address : 0x0
Interrupt (36) PWM3

name : PWM3_S
description : Pulse width modulation unit 7
base address : 0x0
Interrupt (36) PWM3

name : REGULATORS_NS
description : Voltage regulators control 0
base address : 0x0

name : REGULATORS_S
description : Voltage regulators control 1
base address : 0x0

name : RTC0_NS
description : Real-time counter 0
base address : 0x0
Interrupt (20) RTC0

name : RTC0_S
description : Real-time counter 1
base address : 0x0
Interrupt (20) RTC0

name : RTC1_NS
description : Real-time counter 2
base address : 0x0
Interrupt (21) RTC1

name : RTC1_S
description : Real-time counter 3
base address : 0x0
Interrupt (21) RTC1

name : SAADC_NS
description : Analog to Digital Converter 0
base address : 0x0
Interrupt (14) SAADC

name : SAADC_S
description : Analog to Digital Converter 1
base address : 0x0
Interrupt (14) SAADC

name : SPIM0_NS
description : Serial Peripheral Interface Master with EasyDMA 0
base address : 0x0
Interrupt (8) UARTE0_SPIM0_SPIS0_TWIM0_TWIS0

name : SPIM0_S
description : Serial Peripheral Interface Master with EasyDMA 1
base address : 0x0
Interrupt (8) UARTE0_SPIM0_SPIS0_TWIM0_TWIS0

name : SPIM1_NS
description : Serial Peripheral Interface Master with EasyDMA 2
base address : 0x0
Interrupt (9) UARTE1_SPIM1_SPIS1_TWIM1_TWIS1

name : SPIM1_S
description : Serial Peripheral Interface Master with EasyDMA 3
base address : 0x0
Interrupt (9) UARTE1_SPIM1_SPIS1_TWIM1_TWIS1

name : SPIM2_NS
description : Serial Peripheral Interface Master with EasyDMA 4
base address : 0x0
Interrupt (10) UARTE2_SPIM2_SPIS2_TWIM2_TWIS2

name : SPIM2_S
description : Serial Peripheral Interface Master with EasyDMA 5
base address : 0x0
Interrupt (10) UARTE2_SPIM2_SPIS2_TWIM2_TWIS2

name : SPIM3_NS
description : Serial Peripheral Interface Master with EasyDMA 6
base address : 0x0
Interrupt (11) UARTE3_SPIM3_SPIS3_TWIM3_TWIS3

name : SPIM3_S
description : Serial Peripheral Interface Master with EasyDMA 7
base address : 0x0
Interrupt (11) UARTE3_SPIM3_SPIS3_TWIM3_TWIS3

name : SPIS0_NS
description : SPI Slave 0
base address : 0x0
Interrupt (8) UARTE0_SPIM0_SPIS0_TWIM0_TWIS0

name : SPIS0_S
description : SPI Slave 1
base address : 0x0
Interrupt (8) UARTE0_SPIM0_SPIS0_TWIM0_TWIS0

name : SPIS1_NS
description : SPI Slave 2
base address : 0x0
Interrupt (9) UARTE1_SPIM1_SPIS1_TWIM1_TWIS1

name : SPIS1_S
description : SPI Slave 3
base address : 0x0
Interrupt (9) UARTE1_SPIM1_SPIS1_TWIM1_TWIS1

name : SPIS2_NS
description : SPI Slave 4
base address : 0x0
Interrupt (10) UARTE2_SPIM2_SPIS2_TWIM2_TWIS2

name : SPIS2_S
description : SPI Slave 5
base address : 0x0
Interrupt (10) UARTE2_SPIM2_SPIS2_TWIM2_TWIS2

name : SPIS3_NS
description : SPI Slave 6
base address : 0x0
Interrupt (11) UARTE3_SPIM3_SPIS3_TWIM3_TWIS3

name : SPIS3_S
description : SPI Slave 7
base address : 0x0
Interrupt (11) UARTE3_SPIM3_SPIS3_TWIM3_TWIS3

name : SPU_S
description : System protection unit
base address : 0x0
Interrupt (3) SPU

name : TAD_S
description : Trace and debug control
base address : 0x0

name : TIMER0_NS
description : Timer/Counter 0
base address : 0x0
Interrupt (15) TIMER0

name : TIMER0_S
description : Timer/Counter 1
base address : 0x0
Interrupt (15) TIMER0

name : TIMER1_NS
description : Timer/Counter 2
base address : 0x0
Interrupt (16) TIMER1

name : TIMER1_S
description : Timer/Counter 3
base address : 0x0
Interrupt (16) TIMER1

name : TIMER2_NS
description : Timer/Counter 4
base address : 0x0
Interrupt (17) TIMER2

name : TIMER2_S
description : Timer/Counter 5
base address : 0x0
Interrupt (17) TIMER2

name : TWIM0_NS
description : I2C compatible Two-Wire Master Interface with EasyDMA 0
base address : 0x0
Interrupt (8) UARTE0_SPIM0_SPIS0_TWIM0_TWIS0

name : TWIM0_S
description : I2C compatible Two-Wire Master Interface with EasyDMA 1
base address : 0x0
Interrupt (8) UARTE0_SPIM0_SPIS0_TWIM0_TWIS0

name : TWIM1_NS
description : I2C compatible Two-Wire Master Interface with EasyDMA 2
base address : 0x0
Interrupt (9) UARTE1_SPIM1_SPIS1_TWIM1_TWIS1

name : TWIM1_S
description : I2C compatible Two-Wire Master Interface with EasyDMA 3
base address : 0x0
Interrupt (9) UARTE1_SPIM1_SPIS1_TWIM1_TWIS1

name : TWIM2_NS
description : I2C compatible Two-Wire Master Interface with EasyDMA 4
base address : 0x0
Interrupt (10) UARTE2_SPIM2_SPIS2_TWIM2_TWIS2

name : TWIM2_S
description : I2C compatible Two-Wire Master Interface with EasyDMA 5
base address : 0x0
Interrupt (10) UARTE2_SPIM2_SPIS2_TWIM2_TWIS2

name : TWIM3_NS
description : I2C compatible Two-Wire Master Interface with EasyDMA 6
base address : 0x0
Interrupt (11) UARTE3_SPIM3_SPIS3_TWIM3_TWIS3

name : TWIM3_S
description : I2C compatible Two-Wire Master Interface with EasyDMA 7
base address : 0x0
Interrupt (11) UARTE3_SPIM3_SPIS3_TWIM3_TWIS3

name : TWIS0_NS
description : I2C compatible Two-Wire Slave Interface with EasyDMA 0
base address : 0x0
Interrupt (8) UARTE0_SPIM0_SPIS0_TWIM0_TWIS0

name : TWIS0_S
description : I2C compatible Two-Wire Slave Interface with EasyDMA 1
base address : 0x0
Interrupt (8) UARTE0_SPIM0_SPIS0_TWIM0_TWIS0

name : TWIS1_NS
description : I2C compatible Two-Wire Slave Interface with EasyDMA 2
base address : 0x0
Interrupt (9) UARTE1_SPIM1_SPIS1_TWIM1_TWIS1

name : TWIS1_S
description : I2C compatible Two-Wire Slave Interface with EasyDMA 3
base address : 0x0
Interrupt (9) UARTE1_SPIM1_SPIS1_TWIM1_TWIS1

name : TWIS2_NS
description : I2C compatible Two-Wire Slave Interface with EasyDMA 4
base address : 0x0
Interrupt (10) UARTE2_SPIM2_SPIS2_TWIM2_TWIS2

name : TWIS2_S
description : I2C compatible Two-Wire Slave Interface with EasyDMA 5
base address : 0x0
Interrupt (10) UARTE2_SPIM2_SPIS2_TWIM2_TWIS2

name : TWIS3_NS
description : I2C compatible Two-Wire Slave Interface with EasyDMA 6
base address : 0x0
Interrupt (11) UARTE3_SPIM3_SPIS3_TWIM3_TWIS3

name : TWIS3_S
description : I2C compatible Two-Wire Slave Interface with EasyDMA 7
base address : 0x0
Interrupt (11) UARTE3_SPIM3_SPIS3_TWIM3_TWIS3

name : UARTE0_NS
description : UART with EasyDMA 0
base address : 0x0
Interrupt (8) UARTE0_SPIM0_SPIS0_TWIM0_TWIS0

name : UARTE0_S
description : UART with EasyDMA 1
base address : 0x0
Interrupt (8) UARTE0_SPIM0_SPIS0_TWIM0_TWIS0

name : UARTE1_NS
description : UART with EasyDMA 2
base address : 0x0
Interrupt (9) UARTE1_SPIM1_SPIS1_TWIM1_TWIS1

name : UARTE1_S
description : UART with EasyDMA 3
base address : 0x0
Interrupt (9) UARTE1_SPIM1_SPIS1_TWIM1_TWIS1

name : UARTE2_NS
description : UART with EasyDMA 4
base address : 0x0
Interrupt (10) UARTE2_SPIM2_SPIS2_TWIM2_TWIS2

name : UARTE2_S
description : UART with EasyDMA 5
base address : 0x0
Interrupt (10) UARTE2_SPIM2_SPIS2_TWIM2_TWIS2

name : UARTE3_NS
description : UART with EasyDMA 6
base address : 0x0
Interrupt (11) UARTE3_SPIM3_SPIS3_TWIM3_TWIS3

name : UARTE3_S
description : UART with EasyDMA 7
base address : 0x0
Interrupt (11) UARTE3_SPIM3_SPIS3_TWIM3_TWIS3

name : UICR_S
description : User information configuration registers User information configuration registers
base address : 0x0

name : VMC_NS
description : Volatile Memory controller 0
base address : 0x0

name : VMC_S
description : Volatile Memory controller 1
base address : 0x0

name : WDT_NS
description : Watchdog Timer 0
base address : 0x0
Interrupt (24) WDT

name : WDT_S
description : Watchdog Timer 1
base address : 0x0
Interrupt (24) WDT


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